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Microprocessors
N/A
103
Electrical Engineering
Undergraduate 3
04/22/2013

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Term
A Computer is...
Definition
a digital system whose operation can be specified via a program.
Term

A program is ...

 

Definition
a sequence of binairy codes that represent instructions for the computer and is stored in memory
Term
One-Hot encoding
Definition
one DFF per state, requires 1DFF per state but simplifies combinational logic
Term
Binary Encoding
Definition
use minimal number of DFFs, but makes combinational logic more complex
Term
Jump Conditionally Instruction
Definition

JC Location

Opcode :01

If LOC=1, then jump to location( counter set equal to specified location)

If LOC = 0, fetch next instruction (counter increments by 1)

Term

Jump Unconditional

Definition

JMP Location

Opcode :00

Fetch next instruction from location ( counter loaded with specified location)

Term
Out data
Definition

Opcode:10

loads output register with data. Used for setting the DOUT[3:0] value

Term
Encoding Instructions
Definition

Code is seperated into Operation code and Data

 

Operation Code: 2 bits at front that dictate operation

Data: 4 bits at the end that dictate the output data

Term
FSM Implementation
Definition

only 7DFFs+ combinational logic

Will only do one number sequence

Will operate a faster clock rate than processor implementation because of simpler logic

Term
Processor Implementation
Definition

Many more gates needed than FSM Implementation

Will execute slower than a FSM Implementation

Gerneral Purpose: can implement any number sequence by simply changing program

Term
Address Bus
Definition
Input bus to memory device specifying location of data to read/write
Term
Data Bus
Definition
Input/Output bus to memory device containing data value being read or written
Term
Prigram Counter
Definition
special register in a processor specifying address of next instruction to be executed
Term
Instruction Mnemonic
Definition
The ASCII representation of an instruction( I.e OUT 4)
Term
Machine Code
Definition
The binary representaion of an instruction
Term
Assembly
Definition
the process of converting instructions to their machine code representation
Term

Microcontroller ( μC)

 

Definition
  • intended as a single chip solution
  • has on-chip non-volatile memory for program storage
  • has more interface functions on-chip
  • dones not have virtual memory support
  • typically lower performance

 

Term
Microprocessor (μP)
Definition
  • requires external support chips
  • does not have on-chip non-volatile memory for program storage
  • has less interface functions on-chip
  • has virtual memory support
  • General purpose are typically higher performance
Term
PIC24 μC
Definition

Instruction Width : 24 Bits

On-Chip program memory: 32K/11264 instrutions

On-chip random Access memory (RAM): 2048 bytes

Clock speed: DC to 80MHz

 

Term
Program Memory
Definition

PIC24 instructions are stored in it(non-volatile)

can support up to 11264 instructions (3  bytes an instruction)

stored in locations 0x000000 - 0x0001FF

Term
Data Memory
Definition

PIC24 data is store here

file registers

is volatile

max size of 65536 x 8

Term
Special Function Registers
Definition

addressed like normal data memory locations but have specified functionallity tied to the hardware.

range from 0x0000 to 0x07FE in data memory

Term
Little Endian Order
Definition
values are stored in memory from least sig byte to most sig byte, in increasing memory locations
Term
MOV Instruction
Definition

MOV{.B}Wns, Wnd

"Copy COntents of Wns register to Wnd register

Wns-> Source register( Uneffected)

Wnd->destination register

 

MOV Wns, f 

“Copy contents of Wns register to data memory location f”.

 

MOV f, Wnd

“Copy contents of data memory location f to register Wnd”.

 

MOV{.B} WREG, f

“Copy content of WREG (default working register) to data memory

location f”.

 

 

moving bytes

move the LSB

 

Term
Indirect Addressing
Definition

[] brackets indicate indirect addressing

move to location in brackets, then move to the memory location stated their. Use that value 

Term
ADD Instruction
Definition

ADD{.B} Wb, Ws, Wd

(Wb) + (Ws) → Wd

if using .B add the LSB of Wb and Ws

 

Term
Subtraction
Definition

SUB{.B} Wb, Ws, Wd

(Wb) – (Ws) → Wd

 

.B Lower 8-bits of Wb, Ws are subtracted

and placed in the lower 8-bits of Wd

Term
Literals( #)
Definition

literal indicates the numerical value not the location

 

literals can range from 0-31.

Term
Clock Cycles vs. Instruction Cycles
Definition

An instruction cycle is TWO clock cycles

max clock freq is 80MHz

 

Term
Basic Performance Equation
Definition

T=niCPI(1/fc)

 

T= program execution Time

ni=number of machine instructions to execute the program

CPI=average number of clocks to execute once machine instruction

fc= processor clock frequency

Term
MIPS
Definition

"Millions of instructions per second"

is 40MIPS (max) for PIC24

Term
Embedded Systems
Definition

a μP-based system used in device performing control and monitoring functions

invisible to the user

 

Term
Masking
Definition

For Clearing

In C the mask is 0x0F which is anded with a line

 

In assembly  mov.b #0x0F,W0 will mask W0

 

For Setting

In C the mask is 0x0E which is anded with a line

 

In assembly  mov.b #0x0E,W0 will mask W0

 

For Complementing

In C the mask is 0x0C which is anded with a line

 

In assembly  mov.b #0x0C,W0 will mask W0

Term
Status Register
Definition

 

[image]

 

special purpose register

Bit0 -> Carry Flag

Bit 1 -> Zero Flag

Term
Shifts
Definition

all bits shift to right by one, ‘0’ into MSB (8-bit right-shift shown)LSR

 

all bits shift to left by one, ‘0’ into LSB (8-bit left-shift shown)SL

Term
Branches
Definition
functions as a conditional goto based upon the setting of one or more flags
Term
Comparison
Definition

performs a subtraction without placing the result in the register 

I.e

Compare Wb with Ws CP {.B} Wb,Ws Wb – Ws

Term
Parallel I/O ports
Definition

PORTA- RA4 through RA0

PORTB- RB15 though RB0

LATx register holds the last value written to PORTx.

Term
Analog/Digital Pin
Definition

PIns shared with this have a max input voltage of Vd+0.3V(3.6V)

Whereas digital pins are max of 5.6 V

 

Term
Weak Drain
Definition
Can enable or disable the pulll up
Term
Open Drain
Definition
Pull up is disabled
Term
Push/Pop Stack
Definition

PUSH

W15 is the stack pointer(SP), dataA is specified by the source addressing mode

 

Push Operation dataA ->(SP), SP = SP +2

[image]

 

POP


pop operation SP = SP-2 where SP as specified by destination addressing mode

[image]

Term
Call/Return Forms
Definition

CALL


call Wn

Push return address on stack, new SP=SP+4, then label WN->PC

 

rcall Wn

Push return address on stack, new SP=SP+4, then label PC + 2*WN->PC

 

RETURN

 

return

pop return adresses from stack into the PC, new SP = SP-4

 

retlw[.b] #lit, WN

Pop return address from stack into the PC, new SP = Sp-4, and lit-> Wn

 

Term
Dynamic Allocation for Locals
Definition

is needed for recursive functions to operate corectly.

New space for parameters and locals are allocated in registers or on the stack

Term
Constructung a Stack Frame
Definition

1.Push parameters (push parm n, push parm n-1)

2. Call subroutine( call)

3.Save old frame pointer( push FP)

4. Create new frame pointer, FP points at first local variable( SP -> FP)

5. Allocate local variable space( SP = SP +s*2)

6. Deallocate local variable space(FP-> SP)

7. Restore old frame pointer (pop FP)

8. Return from subroutine(return)

9. Save return value (move)

10. Clean stack of passed parameters (pops or SP = SP -(k*2)

Term
2's complement
Definition

0-N

range is -2n-1 to 2n-1-1

 

[image]

 

Overflow occurs when two positive numbers are added together and a negative comes out

Term
Adding Precision
Definition

Unsigned: just add zeroes left of it 

Signed: Take the sign bit and extend it to the left

 

Term
Signed Shifts
Definition

Shift in the MSB and shift others to the right

 [image]

Term
Hardware generated Interupt
Definition
used to provide response to occuing or unpredictable
Term
Software generated
Definition
used to provide exception handling(i.e divide by zero) or traps for code debugging
Term
Polled Input/Output
Definition

processor contiually checks IO device to see if it is ready for data transfer.

Inefficient, processor wastes time checking for ready condition

either checks too often or not enough

Term
Interrupt Driven IO
Definition

IO device interupts porcessot when it is ready for data transfer

very efficient

 

Term
External Interrupt Sources
Definition

dedicated signals on pins

change notification pins

serial port events

Term
Interntal Interrupt Sources
Definition

Signals from timer/counters, math errors

Stack overflows

Term
Interrupt Priorities
Definition

priorities 0 to 7

normal instruction execution is 0

ALL INTERUPTS MUST HAVE HIGHER THAN 0

ASsigning a zero masks/disables that interupt

An interupt with higher priority can interrupt a currently executing ISR with a lower priority

IF TWO HAPPEN AT THE SAME TIME THE ONE WITH HTE LOWER VECTOR NUMBER HAS THE HIGHER NATURAL PRIORITY

Term
Enabling an interupt
Definition

has flag bit, priority bit and a enable bit

FLAG BIT- whenever the flag condition is true

PRIORITY- set by interupt priority

ENABLE- the bit must be '1' for hte ISR to be executed

ISR must clear the flag bit or else the ISR will get stuck in an infinite loop

Term
Traps
Definition

sprecial type of interupt, non-masktable, has higher priority than normal interupts. ALways enabled

HARD TRAP: CPU stops after instruction at which trap occurs

 

SOFT TRAP: CPU continues executing instructions as trap os samples and acknowledged

Term
ISR Entry
Definition
NUmber of cycles from interupt until 1st instruction of ISR is executes
Term
ISR Exit
Definition
From RETFIE to program resumed
Term
ISR Overhead
Definition

Ientry: Number of cycyles for ISR entry(four on PIC)

Ibody: NUmber of instruction cycles for the ISR Body(not including retfie

Iexit: Number of instruction cycles for ISR exit(three on PIC)

FIsr:Frequency(number of times per second) at which the ISR is triggered

TISR: ISR triggering perios, 1/Fisr

ISR% = [(Ientry+Ibody+Iexit)Fisr]/Fcy*100

Golden Rule: An ISR should do its work as quickly as

possible. When an ISR is executing, it is keeping other ISRs of

equal priority and lower from executing, as well as the main code!

Term
Change Notification(CN) interupt
Definition
When enabled, triggers an interrupt when a change occurs on a pin
Term
Remappable Pins
Definition

 

Some inputs/outputs for internal modules must be mapped to

RPx pins (remappable pins) if they are to be used.

 

 

Term
Important ISR Rules:
Definition

The ISR should do its work as fast as possible.

Do not put long software delays into an ISR.

An ISR should never wait for I/O, the I/O event should trigger

the ISR!

An ISR is never called as a subroutine.

Term
Timers
Definition

Just a counter.

Time is related to the number of Timer Ticks by multiplying by the clock period of the timer.

 

Time = ticksxTtmr

 

Term
T2IF Period
Definition

The T2iF flag is set when:

Tt2if=(PR2+1)*(PRE/Fcy)

PR2 is equal to the maximum value and the pre is equal to a given value. The value of PR2 for a 16bit register cannot be larger than 65535

Term
PERIODIC INTERRUPT
Definition
Configuring Timer2 to interrupt every Tt2if period
Term
Semaphore
Definition
A flag set by an ISR when an IO event occurs.
Term
Analog-to-Digital Converter
Definition

ADC

converts an input analog value to a digital representation on its output

Term
Digital to Analog Converter
Definition
converts a binary input value to an analog output voltage
Term
Basic operations of MAC( Multiply-Accumulate)
Definition
  1. Initailize a pointer to data[0]
  2. initailize a second pointer to coeff[0]
  3. read data[i] into core
  4. read coeff[i] into core
  5. multiply data[i]*coeff[i]
  6. add the product to the previous products(ACCUMULATE)
  7. increment the Pointers
  8. Increment i 
  9. if i<3, go back to step 3

STEPS 3-8 OCCUE IN A SINGLE MACHINE CYCLE(ONE CLOCK)

 

Term
Sample Period
Definition
for ADC, time between each conversion. Typically a fixed rate. fs=1/Ts
Term
ADC Equations
Definition

Resolution

0.5N*(Vref+ - Vref-)

Assume Vref- is 0

 

OUT

Vin/Vref*2N= Output_code

 

LSB

1LSB = Vref/2N

Term
DAC Equations
Definition

IN

Vout/Vref *2N= Input_code

 

LSB

1LSB = Vref/2N

Term
Counter Ramp ADC
Definition
Control logic uses counter to apply successive codes 0,1,2,3... to DAC until DAC is greater than Vin. Worst case time for each conv is 2N clock cycles.
Term
Successive Approximation ADC
Definition

Initially set VDAC to 1/2 Vref, then see if Vin is higher or lower than VDAC. if greater then next guess is between Vref and 1/2 Vref. else guess is between 1/2 Vref and 0.

Takes N clock cycles.

 

Use only one comparator

Take one clock cycle per bit

high precision

Term
Flash ADC
Definition

Fastest possible conversion time

requires most tansistors of any architecture

N-bit converter requires 2N-1 comparators

done in one clock cycle

 

Term
R-2R Ladder
Definition

Divides Vref voltage to a binairy weighted value 4-bit value.

IF Xn is connected to Vref then that bit vlue is '1' else 0

Term
PIC24 ADC
Definition

has successive approximation

10 bit defualt or 12 but resolution

4MHz period

Term
Conversion TIme
Definition

Total conversion time is smapling time +conversion time.

 

 

Conversion TIme is number of bits +2Tad periods

Term
MAX5353 Unipolar code table
Definition
[image]
Term
Organization
Definition
specifies its logical operation but not necessarily its internal architechture.
Term
Capacity
Definition
total number of bits of storage
Term
ROM Internal Stuctures
Definition

2k x n

64x1 = 64 bits with 2 level decoding

 

16x4 = 64 bit Memory with two-level decoding

 

32Kx1 = 32 Kbit memory with two-level decoding

32Kx8 = 256 Kbit memory with two-level decoding

 

 

Term
Read-Write Memory (RAM)
Definition

market is dominated by “dynamic RAM”.DRAM

but“static RAM” (SRAM) is the fastest

Term
static RAM (SRAM)
Definition

One bit of SRAM is based on back to back inverters.

COnstructed with 6 CMOS trnasistors

Term

Dynamic RAM ( DRAM)

 

Definition

One bit of DRAM requires onla a single transistor and a single capacitor.

Physically smaller and consumes less power than SRAM BUT it only stores for a few mili seconds

Term
Basic READ Machine Cycle
Definition
When address goes stable ...Microprocessor takes data from data bus when /RD goes to 1
Term
Basic WRITE Machine Cycle
Definition
Check for Data and Address to both be stable, then when the microprossesor has /WR go to 0, it indicates that data is available on the data bus at that point
Term
Memiry Maps
Definition

For a 3:8 Line Decoder

Y0:0000-1FFF

Y1:2000-3FFF

Y2:4000-5FFF

Y3:6000-7FFF

Y4:8000-9FFF

Y5:A000-BFFF

Y6:C000-DFFF

Y7:E000-FFFF

 

Then look to see where the outputs(Y0-Y7) go to to see if the memory map needs to be changed

Term
Fixed Point Numbers
Definition

view decimal point being in the same place for all numbers involved in the calculations.

 

Common notation is X.Y, where X is the number og numbers to the left and Y is the number of numbers to the right of the decimal point

Term
converting X.Y binary to decimal, decimal to X.Y format
Definition

If want decimal divide the number by 2Y

 

If wan bin, multiply the number by 2Y

 

For a signed number Dec to Bin is the same

but to do bin to dec you must first find the magnitude(0 - bin) then divide by 2Y

Term
Saturating Arithmetic
Definition

if an overflow occurs, number is clamped to the max possible value.

For 2's compliment:

If Overflow = 1, then:

• If one of the operands is negative, then result is 0x80

• If one of the operands is positive, then result is 0x7F

Term
Binary Coded Decimal
Definition

encodes decimal digits as their equiv 4-bit value

ie. 73(dec) = 0x73(BCD)

Term
BCD Addition, Subtraction
Definition

Addition is the same as decimal addition.

Subtraction is done by subtracting the bottom number from the ten's complement ( for negative 99 and then add 1, 000 for positive)  then that number is added to the number it is being subtracted from

Term
Floating Point Representations
Definition

goal is to represent a large range of numbers

dec ex: 3.0 x 103

bin ex: 1.10110 x 2-3

Term
IEE Floating POint Standard
Definition

single precision ( short) -> 32 bits

Double precision (long) ->64 bits

Temporary (Extended) -> 80 Bits

Term

single precision ( short) -> 32 bits

 

Definition

1 bit in sign, 8 bits exponent, 23 significand 

binary point is assumed left of the fraction

assumes a bias of 127

is an IMPLIED 1 to the left of the bin point(significand)

(-1)s 1.f x 2e-127

The range is therefore 1.0 <= significand < 2

 

IEEE 754

exponent encoding is bais 127. To get the encoding take the exponent and add 127

( smallest allowed is -126 and largest is 127)

 

Note: 2x = 10y, 0.3x = y

Term
Seven Regions of Real Number Line
Definition

1.Large negative numbers less than −0.999 × 1099.

2.Negative numbers between −0.999 × 1099 and −0.100×10−99.

3.Small negative numbers, magnitudes less than 0.100×10−99.

4.Zero.

5.Small positive numbers, magnitudes less than 0.100 × 10−99.

6.Positive numbers between 0.100 × 10−99 and 0.999 × 1099.

7.Large positive numbers greater than 0.999 × 1099.

Term

Double precision (long real) in 64 bits

 

Definition

1 bit for sign

11 for exponent

52 for fraction

Term
Extended precision (temporary real) in 80 bits
Definition

1 bit for sign

26 for Exp

52 for fraction

Term
Convert Decimal FP to binary encoding
Definition
  1. Find the binairy number of the decimal number given
  2. NORMALIZE the number( in the format 1.mmmm x 2exp) the shift right and add one to exponent each shift left subtract one from exponent
Term
Special NUmbers
Definition

Zero is represented by ALL FIELDS = 0.

+/- Infinity is Exponent field = 255 = FFh, significand = 0.

+/- Infinity is produced by anything divided by 0.

NaN (Not A Number) is Exponent field = 255 = FFh,

significand = nonzero. NaN is produced by invalid

operations like zero divided by zero, or infinity – infinity

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