Term
| Speed will depend on the clock cycle (_____) of the circuits |
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Definition
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Term
| Number of tasks completed per time unit |
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Definition
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| Counts everything (disk and memory accesses, I/O, etc.) |
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Definition
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| doesn't count I/O or time spent running other programs, can be broken up into system time, and user time |
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| time spend executing the lines of code that are "in" our program |
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Term
| number of clock cycles it takes to complete the executing of your program |
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Term
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Definition
| CPU(seconds/program)=IC(instructions/program)*CPI(cycles/instruction)*Clk(seconds/cycle) |
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Definition
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Term
| Calculate the CPIi, % time, and CPItotal for the following: ALU: Freq- 50%, Cycles- 1 Load: Freq- 20%, Cycles- 2 Store: Freq- 10%, Cycles- 2 Branch: Freq- 20%, Cycles- 2 |
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Definition
| 0.5, 0.4, 0.2, 0.4, 33%, 27%, 13%, 27%, 1.5 |
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Term
| Principles of Computer Architecture Design: Thumb Rules |
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Definition
| Common case fast, Principle of Locality, Concurrency/Parallelism |
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Term
| Focus on improving those instructions that are frequently used |
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Definition
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Term
| Items with nearby addresses tend to be referenced close together in time |
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Definition
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Term
| Recently referenced items are likely to be referenced in the near future |
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Definition
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Term
| 2 concepts of Principle of Locality |
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Definition
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Term
| Overlap the instruction execution steps |
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Definition
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Term
| Enhance/optimize a portion of code for application to run faster |
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Definition
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Term
| Focus optimizations of return on _____ and code segments that take _____ time |
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Definition
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Term
| Can read from any location by supplying address of data |
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Definition
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Term
| Ram is packaged as a _____. Basic storage unit is a _____ (one _____ per cell). Multiple RAM chips form a _____. |
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Definition
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Term
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Definition
| SRAM (Static Random Access Memory), DRAM (Dynamic Random Access Memory) |
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| Read only memories-store OS, e.g. ROM, EPROM, EEPROM, Flash, etc. |
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Definition
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Term
| _____ is small and/or expensive. _____ is slow and/or cheap |
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Definition
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Term
| Data transferred between _____ and _____ |
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Definition
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Term
| What does processor do while waiting for data to be transferred? |
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Definition
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Term
| List the ascending order of access time for the following: main memory, register, cache, disk memory |
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Definition
| register, cache, main memory, disk memory |
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Term
| Most program do not access code or data uniformly |
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Definition
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Term
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Definition
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| Programs tend to reuse data and instructions near those they have used recently, or that were recently referenced themselves |
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Definition
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Term
sum = 0; for (i = 0; i < n; i++) { sum += a[i]; } return sum; Data: Reference array elements in succession (stride-1 reference pattern)- _____ _____, Reference sum each iteration- _____ _____ Instructions: Reference instructions in sequence- _____ _____, Cycle through loop repeatedly- _____ _____ |
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Definition
| spatial locality, temporal locality, spatial locality, temporal locality |
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Term
| Processor is (1) in _____ or (2) waits for _____ |
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Definition
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Term
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Definition
| execution time=(execution cycles+memory stall cycles)*cycle time |
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Term
| Improve performance=decrease _____ cycles |
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Definition
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Term
| More stall cycles=increase in _____ |
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Definition
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Term
| an ordered sequence of storage cells, each capable of holding a piece of data |
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Definition
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Term
| _____ is size of memory: N bit address space=_____ memory locations; _____ is size of each memory location-k bits; Total memory size=_____ _____. Memory addresses go from 0 to 2N-1 |
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Definition
| Address space, 2N, k.2N bits |
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Term
| Build large memory using several smaller memory chips (_____). CPU generates an address request, the address can be in any _____ |
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Definition
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Term
| A _____ is a collection of parallel wires that carry address, data, and control signals. Buses are typically shared by _____ devices. |
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Definition
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Term
| What do these statements describe? Gap between main memory speed and processor speed. Place a small but fast memory close to the processor. |
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Definition
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Term
| Reading data/inst from memory will take _____ than 1 processor cycle |
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Definition
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Term
| _____ amount of fast on-chip cache memory. _____ amount of off-chip main memory. _____ disk |
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Definition
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Term
| On-chip cache takes _____ processor cycle. Main memory takes a number (_____) processor cycles. Disk takes _____ amount. |
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Definition
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Term
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Definition
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Term
| If data is found in cache then time=1, called a _____ _____. Else time is main memory access time, _____ _____, means read from next level |
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Definition
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Term
| Control unit to determine if location is in cache or not |
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Definition
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Term
| data appears in block in upper level |
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Definition
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Term
| fraction of memory access found in upper level |
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Definition
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Term
| _____ _____ is time to access upper level which consists of _____ access time+time to determine _____/_____ |
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Definition
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Term
| data needs to be retrieved from a block in the lower level |
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Definition
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Term
| Miss Rate=1 - (_____ _____) |
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Definition
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Term
| extra time to replace a block in the upper level+time to deliver the block to the processor |
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Definition
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Term
| _____ _____ _____=number of misses*miss penalty=IC*(memory accesses/instruction)*miss rate*miss penalty |
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Definition
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Term
| _____ _____ (hit ratio) h=(no. of requests that are hits)/(total no. requests) |
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Definition
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Term
| Cost of _____ _____=hCh+(1-h)Cm |
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Definition
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Term
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Definition
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Term
| _____ _____ _____=number of misses*miss penalty=IC*(memory accesses/instruction)*miss rate*miss penalty |
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Definition
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Term
| _____ _____ (hit ratio) h=(no. of requests that are hits)/(total no. requests) |
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Definition
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Term
| Cost of _____ _____=hCh+(1-h)Cm |
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