Term
| What is SRAM? and describe. |
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Definition
| Static random access memory. Fastest external memory. It is based on the utilization of flip flops as memory elements. |
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Term
| What is DRAM? and describe. |
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Definition
| Dynamic Random Access Memory. Uses a transistor as a control and a capacitor as the storing element. |
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Term
| DRAM: list the 3 principles of operation. |
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Definition
| 1. if write bit is set and the cell is selected, then the capacitor charges. 2. if write is cleared then bit line is grounded. 3. during read, the bit line is connected to the capacitor and the value is extracted. |
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Term
| What is EDO? and describe. |
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Definition
| Extended Data Out or fast page mode DRAM reads or writes a page addressed in the same row of the DRAM during one or half a clock cycle per word. |
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Term
| What is SDRAM? and describe. |
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Definition
| Synchronous Dynamic Random Access Memory. |
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Term
| What are the two concepts of locality? |
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Definition
| 1. Spatial locality (in space): IF the data item is referenced, items whose addresses are close will be referenced. 2. temporal locality (in time): if the data item is referenced, then it will be referenced. |
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Term
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Definition
| A unit of information to be transfered between cache and memory. Note: cache controller performs the block transfer procedure. |
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Term
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Definition
| Data requested by CPU is found in the cache. |
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Term
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Definition
| Data requested by CPU is not found in the cache. |
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Term
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Definition
| The percentage of references found in cache. Ex. CPU requests 100 data/instructsion, but only 92 items have been found in the cache. Therefore (hit rate) = (92/100)*100% = 92% |
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Term
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Definition
| The percentage of references not found in cache. Ex. (miss rate) = 1 - (hit rate) = 8% |
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Term
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Definition
| The time to determine hit/miss and data access time. |
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Term
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Definition
| The time to determine hit/miss, update cache (transfer new block of instructions or data) and access time. |
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Term
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Definition
| Finding a new block in the cache. |
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Term
| What is a validity bit and when is it set/cleared? |
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Definition
| A flag to determine the if a cache block is valid. What a task or task segment eds or interrupts, current content of cache can be made invalid for all cache entries. |
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Term
| What is the difference between indirect mapped cache and direct mapped cache? |
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Definition
| The indirect uses a D-bit. |
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Term
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Definition
| A flag that shows if any data-word in cache entry has been changed. |
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Term
| How do you calculate: average access time? |
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Definition
| (hit rate) * (hit time) + (miss rate) * (miss penalty) |
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Term
| How do you calculate: hit time? |
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Definition
| (hit/miss determination time) + (cache access time) |
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Term
| How do you calculate: miss penalty? |
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Definition
| (time to replace block) + (hit time) |
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Term
| How do you calculate: the time is takes to replace a block? |
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Definition
| (memory address period) + (block transfer time) |
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Term
| How do you calculate: memory address period? |
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Definition
| ((row address) + RAS) + ((col address) + CAS) |
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Term
| How do you calculate: block transfer time? |
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Definition
| (# words in a bloack) * (bus bandwidth) |
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